MPU-6500 Register Map

Register addresses for the MPU-6500 IMU. More...

Gyroscope Self-Test Registers
#define	REG_SELF_TEST_X_GYRO   0x00
#define	REG_SELF_TEST_Y_GYRO   0x01
#define	REG_SELF_TEST_Z_GYRO   0x02

Accelerometer Self-Test Registers
#define	REG_SELF_TEST_X_ACCEL   0x0D
#define	REG_SELF_TEST_Y_ACCEL   0x0E
#define	REG_SELF_TEST_Z_ACCEL   0x0F

Gyroscope Offsets
#define	REG_XG_OFFSET_H   0x13
#define	REG_XG_OFFSET_L   0x14
#define	REG_YG_OFFSET_H   0x15
#define	REG_YG_OFFSET_L   0x16
#define	REG_ZG_OFFSET_H   0x17
#define	REG_ZG_OFFSET_L   0x18

Sample Rate & Config
#define	REG_SMPLRT_DIV   0x19
#define	REG_CONFIG   0x1A
#define	REG_GYRO_CONFIG   0x1B
#define	REG_ACCEL_CONFIG   0x1C
#define	REG_ACCEL_CONFIG2   0x1D
#define	REG_LP_ACCEL_ODR   0x1E
#define	REG_WOM_THR   0x1F

FIFO & I2C Master
#define	REG_FIFO_EN   0x23
#define	REG_I2C_MST_CTRL   0x24
#define	REG_I2C_SLV0_ADDR   0x25
#define	REG_I2C_SLV0_REG   0x26
#define	REG_I2C_SLV0_CTRL   0x27
#define	REG_I2C_SLV1_ADDR   0x28
#define	REG_I2C_SLV1_REG   0x29
#define	REG_I2C_SLV1_CTRL   0x2A
#define	REG_I2C_SLV2_ADDR   0x2B
#define	REG_I2C_SLV2_REG   0x2C
#define	REG_I2C_SLV2_CTRL   0x2D
#define	REG_I2C_SLV3_ADDR   0x2E
#define	REG_I2C_SLV3_REG   0x2F
#define	REG_I2C_SLV3_CTRL   0x30
#define	REG_I2C_SLV4_ADDR   0x31
#define	REG_I2C_SLV4_REG   0x32
#define	REG_I2C_SLV4_DO   0x33
#define	REG_I2C_SLV4_CTRL   0x34
#define	REG_I2C_SLV4_DI   0x35
#define	REG_I2C_MST_STATUS   0x36

Interrupts
#define	REG_INT_PIN_CFG   0x37
#define	REG_INT_ENABLE   0x38
#define	REG_INT_STATUS   0x3A

Sensor Outputs
#define	REG_ACCEL_XOUT_H   0x3B
#define	REG_ACCEL_XOUT_L   0x3C
#define	REG_ACCEL_YOUT_H   0x3D
#define	REG_ACCEL_YOUT_L   0x3E
#define	REG_ACCEL_ZOUT_H   0x3F
#define	REG_ACCEL_ZOUT_L   0x40
#define	REG_TEMP_OUT_H   0x41
#define	REG_TEMP_OUT_L   0x42
#define	REG_GYRO_XOUT_H   0x43
#define	REG_GYRO_XOUT_L   0x44
#define	REG_GYRO_YOUT_H   0x45
#define	REG_GYRO_YOUT_L   0x46
#define	REG_GYRO_ZOUT_H   0x47
#define	REG_GYRO_ZOUT_L   0x48

External Sensor Data
#define	REG_EXT_SENS_DATA_00   0x49
#define	REG_EXT_SENS_DATA_23   0x60

I2C Data Out
#define	REG_I2C_SLV0_DO   0x63
#define	REG_I2C_SLV1_DO   0x64
#define	REG_I2C_SLV2_DO   0x65
#define	REG_I2C_SLV3_DO   0x66

Control & Power Management
#define	REG_I2C_MST_DELAY_CTRL   0x67
#define	REG_SIGNAL_PATH_RESET   0x68
#define	REG_MOT_DETECT_CTRL   0x69
#define	REG_USER_CTRL   0x6A
#define	REG_PWR_MGMT_1   0x6B
#define	REG_PWR_MGMT_2   0x6C

FIFO
#define	REG_FIFO_COUNTH   0x72
#define	REG_FIFO_COUNTL   0x73
#define	REG_FIFO_R_W   0x74

Identification
#define	REG_WHO_AM_I   0x75

Accelerometer Offsets
#define	REG_XA_OFFSET_H   0x77
#define	REG_XA_OFFSET_L   0x78
#define	REG_YA_OFFSET_H   0x7A
#define	REG_YA_OFFSET_L   0x7B
#define	REG_ZA_OFFSET_H   0x7D
#define	REG_ZA_OFFSET_L   0x7E

Magnetometer Outputs
#define	REG_MAG_XOUT_H   0x03
#define	REG_MAG_XOUT_L   0x04
#define	REG_MAG_YOUT_H   0x05
#define	REG_MAG_YOUT_L   0x06
#define	REG_MAG_ZOUT_H   0x07
#define	REG_MAG_ZOUT_L   0x08

Detailed Description

Register addresses for the MPU-6500 IMU.

Macro Definition Documentation

REG_ACCEL_CONFIG

#define REG_ACCEL_CONFIG   0x1C

Accelerometer configuration

REG_ACCEL_CONFIG2

#define REG_ACCEL_CONFIG2   0x1D

Secondary accel config

REG_ACCEL_XOUT_H

#define REG_ACCEL_XOUT_H   0x3B

Accel X high byte

REG_ACCEL_XOUT_L

#define REG_ACCEL_XOUT_L   0x3C

Accel X low byte

REG_ACCEL_YOUT_H

#define REG_ACCEL_YOUT_H   0x3D

Accel Y high byte

REG_ACCEL_YOUT_L

#define REG_ACCEL_YOUT_L   0x3E

Accel Y low byte

REG_ACCEL_ZOUT_H

#define REG_ACCEL_ZOUT_H   0x3F

Accel Z high byte

REG_ACCEL_ZOUT_L

#define REG_ACCEL_ZOUT_L   0x40

Accel Z low byte

REG_CONFIG

#define REG_CONFIG   0x1A

General configuration

REG_EXT_SENS_DATA_00

#define REG_EXT_SENS_DATA_00   0x49

External sensor data register start

REG_EXT_SENS_DATA_23

#define REG_EXT_SENS_DATA_23   0x60

External sensor data register end

REG_FIFO_COUNTH

#define REG_FIFO_COUNTH   0x72

FIFO count high byte

REG_FIFO_COUNTL

#define REG_FIFO_COUNTL   0x73

FIFO count low byte

REG_FIFO_EN

#define REG_FIFO_EN   0x23

FIFO enable

REG_FIFO_R_W

#define REG_FIFO_R_W   0x74

FIFO read/write

REG_GYRO_CONFIG

#define REG_GYRO_CONFIG   0x1B

Gyroscope configuration

REG_GYRO_XOUT_H

#define REG_GYRO_XOUT_H   0x43

Gyro X high byte

REG_GYRO_XOUT_L

#define REG_GYRO_XOUT_L   0x44

Gyro X low byte

REG_GYRO_YOUT_H

#define REG_GYRO_YOUT_H   0x45

Gyro Y high byte

REG_GYRO_YOUT_L

#define REG_GYRO_YOUT_L   0x46

Gyro Y low byte

REG_GYRO_ZOUT_H

#define REG_GYRO_ZOUT_H   0x47

Gyro Z high byte

REG_GYRO_ZOUT_L

#define REG_GYRO_ZOUT_L   0x48

Gyro Z low byte

REG_I2C_MST_CTRL

#define REG_I2C_MST_CTRL   0x24

I2C master control

REG_I2C_MST_DELAY_CTRL

#define REG_I2C_MST_DELAY_CTRL   0x67

I2C master delay control

REG_I2C_MST_STATUS

#define REG_I2C_MST_STATUS   0x36

I2C master status

REG_I2C_SLV0_ADDR

#define REG_I2C_SLV0_ADDR   0x25

I2C slave 0 address

REG_I2C_SLV0_CTRL

#define REG_I2C_SLV0_CTRL   0x27

I2C slave 0 control

REG_I2C_SLV0_DO

#define REG_I2C_SLV0_DO   0x63

I2C slave 0 data out

REG_I2C_SLV0_REG

#define REG_I2C_SLV0_REG   0x26

I2C slave 0 register

REG_I2C_SLV1_ADDR

#define REG_I2C_SLV1_ADDR   0x28

I2C slave 1 address

REG_I2C_SLV1_CTRL

#define REG_I2C_SLV1_CTRL   0x2A

I2C slave 1 control

REG_I2C_SLV1_DO

#define REG_I2C_SLV1_DO   0x64

I2C slave 1 data out

REG_I2C_SLV1_REG

#define REG_I2C_SLV1_REG   0x29

I2C slave 1 register

REG_I2C_SLV2_ADDR

#define REG_I2C_SLV2_ADDR   0x2B

I2C slave 2 address

REG_I2C_SLV2_CTRL

#define REG_I2C_SLV2_CTRL   0x2D

I2C slave 2 control

REG_I2C_SLV2_DO

#define REG_I2C_SLV2_DO   0x65

I2C slave 2 data out

REG_I2C_SLV2_REG

#define REG_I2C_SLV2_REG   0x2C

I2C slave 2 register

REG_I2C_SLV3_ADDR

#define REG_I2C_SLV3_ADDR   0x2E

I2C slave 3 address

REG_I2C_SLV3_CTRL

#define REG_I2C_SLV3_CTRL   0x30

I2C slave 3 control

REG_I2C_SLV3_DO

#define REG_I2C_SLV3_DO   0x66

I2C slave 3 data out

REG_I2C_SLV3_REG

#define REG_I2C_SLV3_REG   0x2F

I2C slave 3 register

REG_I2C_SLV4_ADDR

#define REG_I2C_SLV4_ADDR   0x31

I2C slave 4 address

REG_I2C_SLV4_CTRL

#define REG_I2C_SLV4_CTRL   0x34

I2C slave 4 control

REG_I2C_SLV4_DI

#define REG_I2C_SLV4_DI   0x35

I2C slave 4 data in

REG_I2C_SLV4_DO

#define REG_I2C_SLV4_DO   0x33

I2C slave 4 data out

REG_I2C_SLV4_REG

#define REG_I2C_SLV4_REG   0x32

I2C slave 4 register

REG_INT_ENABLE

#define REG_INT_ENABLE   0x38

Interrupt enable

REG_INT_PIN_CFG

#define REG_INT_PIN_CFG   0x37

Interrupt pin configuration

REG_INT_STATUS

#define REG_INT_STATUS   0x3A

Interrupt status

REG_LP_ACCEL_ODR

#define REG_LP_ACCEL_ODR   0x1E

Low power accel output data rate

REG_MAG_XOUT_H

#define REG_MAG_XOUT_H   0x03

Mag X high

REG_MAG_XOUT_L

#define REG_MAG_XOUT_L   0x04

Mag X low

REG_MAG_YOUT_H

#define REG_MAG_YOUT_H   0x05

Mag Y high

REG_MAG_YOUT_L

#define REG_MAG_YOUT_L   0x06

Mag Y low

REG_MAG_ZOUT_H

#define REG_MAG_ZOUT_H   0x07

Mag Z high

REG_MAG_ZOUT_L

#define REG_MAG_ZOUT_L   0x08

Mag Z low

REG_MOT_DETECT_CTRL

#define REG_MOT_DETECT_CTRL   0x69

Motion detection control

REG_PWR_MGMT_1

#define REG_PWR_MGMT_1   0x6B

Power management 1

REG_PWR_MGMT_2

#define REG_PWR_MGMT_2   0x6C

Power management 2

REG_SELF_TEST_X_ACCEL

#define REG_SELF_TEST_X_ACCEL   0x0D

Self-test register for X accel

REG_SELF_TEST_X_GYRO

#define REG_SELF_TEST_X_GYRO   0x00

Self-test register for X gyro

REG_SELF_TEST_Y_ACCEL

#define REG_SELF_TEST_Y_ACCEL   0x0E

Self-test register for Y accel

REG_SELF_TEST_Y_GYRO

#define REG_SELF_TEST_Y_GYRO   0x01

Self-test register for Y gyro

REG_SELF_TEST_Z_ACCEL

#define REG_SELF_TEST_Z_ACCEL   0x0F

Self-test register for Z accel

REG_SELF_TEST_Z_GYRO

#define REG_SELF_TEST_Z_GYRO   0x02

Self-test register for Z gyro

REG_SIGNAL_PATH_RESET

#define REG_SIGNAL_PATH_RESET   0x68

Signal path reset

REG_SMPLRT_DIV

#define REG_SMPLRT_DIV   0x19

Sample rate divider

REG_TEMP_OUT_H

#define REG_TEMP_OUT_H   0x41

Temperature high byte

REG_TEMP_OUT_L

#define REG_TEMP_OUT_L   0x42

Temperature low byte

REG_USER_CTRL

#define REG_USER_CTRL   0x6A

User control

REG_WHO_AM_I

#define REG_WHO_AM_I   0x75

Device ID register

REG_WOM_THR

#define REG_WOM_THR   0x1F

Wake-on-motion threshold

REG_XA_OFFSET_H

#define REG_XA_OFFSET_H   0x77

Accel X offset high

REG_XA_OFFSET_L

#define REG_XA_OFFSET_L   0x78

Accel X offset low

REG_XG_OFFSET_H

#define REG_XG_OFFSET_H   0x13

Gyro X offset high byte

REG_XG_OFFSET_L

#define REG_XG_OFFSET_L   0x14

Gyro X offset low byte

REG_YA_OFFSET_H

#define REG_YA_OFFSET_H   0x7A

Accel Y offset high

REG_YA_OFFSET_L

#define REG_YA_OFFSET_L   0x7B

Accel Y offset low

REG_YG_OFFSET_H

#define REG_YG_OFFSET_H   0x15

Gyro Y offset high byte

REG_YG_OFFSET_L

#define REG_YG_OFFSET_L   0x16

Gyro Y offset low byte

REG_ZA_OFFSET_H

#define REG_ZA_OFFSET_H   0x7D

Accel Z offset high

REG_ZA_OFFSET_L

#define REG_ZA_OFFSET_L   0x7E

Accel Z offset low

REG_ZG_OFFSET_H

#define REG_ZG_OFFSET_H   0x17

Gyro Z offset high byte

REG_ZG_OFFSET_L

#define REG_ZG_OFFSET_L   0x18

Gyro Z offset low byte